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Sparse signals - 21 Feb 2020

A sparse signal consists of multiple pulses (100 bits or more) distributed randomly over a longer period of time (0.1 sec or more). My current data acquisition electronics are limited in RAM, to about 500 samples/channel, so I will only be using 100 bit signals at present. But, hopefully, the results for 1000 bits or more would be similar. Below is a composite image showing 55 random input signals (in yellow), 5 different examples each row, with the fraction of "on" bits varying from 0.0 to 1.0 down the plot. Each bit is 2.9 ms long. Outputs from the accumulating 2-threshold inverter device are in green. The input resistor used is 55K. The voltage across the input capacitor (0.22u) is shown in light blue; the approximate thresholds of the device are in purple:

(Click for larger image)

Here are plots of the percentage of on bits (y axis) in the input signals (left) and the output signals (right), with respect to the input signal percent on. The color is also based on input percent on (from blue to red). For the input, this is just a straight line (as it should be), and for the output it is sigmoidally decreasing with increasing number of pulses. So, this is one way of generating a non-linear function with this device:

Here are plots of the modulation (the number of 0->5 and 5->0 voltage transitions, per bit) for inputs (left) and outputs (right), again with respect to input number of pulses. Note that the output with this resistor/capacitor combination is modulated considerably less than the input, due to the lowpass functionality. However, both signals reach maximum modulation with 50% of all bits on, and this is another non-linear output of the device:

Here are plots of the average run length (number of contiguous on bits in a row, given as a percentage of the total period) of inputs (left) and outputs (right). These two plots are interesting because while the input run length is generally small and fairly constant for most signals, until almost all bits are on, the output run length varies more with respect to its input and has a greater diversity of intermediate values. These plots give an indication of how "clumpy" each set of signals is:

Here are three views, at different angles, of the 3d space of input signals for percent on (x axis), modulation (y axis), and average run length (z axis, all values from 0.0 to 1.0):

Here are similar views of the space of output signals. Note that, in essence, the device is turning the variation of points in the xy plane (percent on and modulation) into variation in the xz plane (percent on and run length). I don't know if this function is useful for anything, but let's see how it develops as we change the input resistor/capacitor combination of the device:

The following plots show output for resistor values of 27.5K, 14K, and 7K. As the resistor value is decreased, the device responds more quickly to the input, and can eventually track it identically (but inverted) at the fixed bit width. As a comparison with the plots shown above, a larger resistor value of 110K is also used in the last plots:

(Click for larger images)

Below are plots of the entire set of input signals for all 5 resistor values, in yellow, and the entire set of output signals, color-coded for each resistor value (blue = 110K, red = 7K):

(Click for larger images)

By changing the resistor value, a 2d surface can be swept out by the output in this space. The output from a slowly responding device (high resistor value = blue) is confined to the xz plane, while the output from a more quickly responding device (low resistor value = red) is mostly confined to the xy plane. Intermediate resistor values (light blue, green, yellow) produce output with a more 3d shape. The limiting output for zero resistance is just the inverse of the input (the x axis is reversed).

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1 March 2020

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